Riverlane - Hardware Engineering Internship 2027
Responsibilities
• Collaborate with experienced hardware and software engineers to investigate and evaluate architectural optimisations • Enhance the decoder’s architecture to improve its flexibility and processing speed • Explore different design approaches and evaluate their potential benefits • Contribute to design decisions involving space and time trade-offs, balancing functionality, resource use and performance • Communicate your work clearly through technical discussions, presentations and written documentation • Develop your understanding of FPGA development, quantum computing and quantum error correction • What we need • In the second or a later year of a Bachelor’s degree • Partway through a Master’s degree • Partway through a PhD • You must be studying Computer Science, Electronic Engineering, Physics, Mathematics or another related technical subject • Proficiency in Python • A solid understanding of low-level computer architecture • Excellent critical-thinking and problem-solving skills • Strong written and verbal communication skills • The ability to take initiative and work effectively as part of a team • A willingness to learn about FPGA development, quantum computing and quantum error correction • Availability to work full-time for 10 to 12 weeks • Even better if… • Even better if… • You have experience with RTL development for FPGA or ASIC systems • You are familiar or interested in quantum computing • You understand optimisation concepts and performance trade-offs • You have some knowledge of networking principles • You have experience using version control, testing or debugging tools • Important notes • Important notes • You must already have the right to work in the UK for the full duration of the internship. If you hold a UK student visa, please check that its conditions allow you to undertake this full-time internship. • PhD students may need to temporarily step away from their PhD to complete the internship. This may affect their right-to-work status, and applicants should check their individual circumstances • You must be available to work full-time for 10 to 12 weeks during the summer vacation period • You will be required to sign an agreement assigning ownership of any intellectual property produced during your internship to Riverlane • Internships are based at our head office in Cambridge, UK
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