Graphcore - Principal Technical Program Manager

• Lead planning, execution and day-to-day management of silicon design programmes, ensuring milestones and dependencies are clearly defined and tracked. • Build and maintain integrated schedules across architecture, RTL, verification, physical design, DFT, CAD and tape-out. • Drive alignment across engineering, product and operations on scope, priorities, resourcing and delivery plans. • Support execution through key phases including specification, design reviews, implementation, sign-off and tape-out readiness. • Manage scope changes, assessing impact on schedule and resources while maintaining stakeholder alignment. • Identify risks, dependencies and challenges early, with clear mitigation and escalation plans. • Coordinate cross-functional readiness for major milestones such as IP integration, design closure and tape-out. • Provide regular updates on programme status, risks and recovery plans. • Drive structured decision-making and accountability across teams. • Capture lessons learned to improve programme management practices and workflows. • Candidate Profile • Candidate Profile • Essential • Bachelor’s degree (or higher) in Electrical/Electronic Engineering, Computer Engineering, Computer Science, or a related field. • 3–5 years’ experience in programme/project management or technical delivery within semiconductor, ASIC, SoC or hardware environments. • Experience supporting silicon design programmes across RTL, verification, physical design and tape-out. • Good understanding of the silicon development lifecycle, including design, integration, implementation and tape-out milestones. • Experience working with cross-functional engineering teams. • Strong organisational and planning skills, with the ability to manage dependencies and competing priorities. • Strong problem-solving skills with a proactive approach to risk and issue management. • Excellent communication and stakeholder management skills across technical and non-technical audiences. • Self-motivated, collaborative, and effective in fast-moving environments. • Desirable • Experience with ASIC/SoC development flows, including design reviews, implementation, sign-off and tape-out. • Familiarity with RTL, physical design, DFT, CAD or silicon platform teams. • Understanding of system-level considerations influencing chip design. • Experience in AI, accelerator, datacentre or high-performance compute silicon programmes. • Knowledge of semiconductor product development from concept to manufacturing handoff.