Fractile - Lead Physical Design Engineer
Requirements
• Bachelor’ Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field. • 7+ years of experience in physical design for advanced technology nodes (e.g., 7nm, 5nm, or below). • Strong proficiency in EDA tools for place & route, STA, and sign-off. • Solid understanding of CMOS technology, semiconductor physics, and process limitations. • Experience with low-power design methodologies, power optimisation techniques, and multi-power domain architectures. • Expertise in timing closure, signal integrity, IR drop analysis, and formal verification. • Proficiency in scripting languages like TCL, Perl, or Python for automation. • Excellent problem-solving skills, communication, and teamwork in a collaborative design environment. • Experience in high-performance computing (HPC), AI accelerators, or networking chips. • Experience or strong interest in leveraging advanced AI tools and models within engineering workflows.
Responsibilities
• Drive the physical implementation of ASIC/SoC designs, including floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off, with potential responsibility for full-chip execution. • Work on synthesis, timing analysis (STA), and optimisation to achieve the best PPA metrics. • Perform power planning and analysis, addressing IR drop, electromigration, and low-power design techniques. • Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification compliance. • Collaborate with DFT engineers to integrate design-for-test (DFT) structures into the physical implementation. • Develop flows in EDA tools such as Cadence Innovus, Synopsys Fusion Compiler, Mentor Graphics Calibre, and others. • Interface with foundries and process engineers to ensure manufacturability and yield optimisation. • Work closely with RTL and architecture teams to drive design feasibility, constraints, and physical-aware RTL design. • Work with advanced AI tools and models to improve productivity, analysis, and design quality.
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