Fractile - Physical Design Engineer

London1mo ago

In Office Intern EMEA Semiconductors Graphic Designer Perl Python

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. • 0–5 years of experience in physical design for advanced technology nodes (e.g., 7nm, 5nm, or below), including internships. • Familiarity with EDA tools for place & route, STA, and sign-off. • Basic understanding of CMOS technology, semiconductor physics, and process limitations. • Exposure to timing closure, signal integrity, IR drop analysis, and formal verification. • Proficiency in scripting languages like TCL, Perl, or Python for automation is a plus. • Excellent problem-solving skills, communication, and teamwork in a collaborative design environment. • Interest in working with advanced AI tools and models as part of the design workflow. • Experience or coursework in high-performance computing (HPC), AI accelerators, or networking chips is a plus.

Responsibilities

• Support the physical implementation of ASIC/SoC designs, including floor planning, placement, clock tree synthesis (CTS), routing, and sign-off. • Work on synthesis, timing analysis (STA), and optimisation to achieve strong PPA metrics. • Assist in power planning and analysis, addressing IR drop, electromigration, and related effects. • Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification compliance. • Collaborate with DFT engineers to integrate design-for-test (DFT) structures into the physical implementation. • Develop flows in EDA tools such as Cadence Innovus, Synopsys Fusion Compiler, Mentor Graphics Calibre, and others. • Work closely with RTL and architecture teams to support design feasibility, constraints, and physical-aware RTL design. • Work with advanced AI tools and models to improve productivity, analysis, and design quality.