CesiumAstro - DSP/FPGA Engineer I

• Assist in the research and design of fast and efficient hardware realisable DSP algorithms to implement functions such as filters, equalisers, timing/carrier recovery loops, multi-rate structures & FFT processing engines. • The development of models to provide real life stimulus for testing the developed algorithms, including phase and Gaussian noise, non-linear RF effects, Doppler, multipath and other such channel impairments. • The development of both floating- and fixed-point models in MATLAB or Python, where the fixed-point model can be directly used to accurately verify the functionality of the VHDL hardware realisation. • Efficient and robust realisation and testing of the developed algorithms using VHDL. • The successful candidate will be versatile and proactive, a clear communicator and team player with good inter-personal and social skills. They will be capable of generating accurate and concise documentation and design notes and be able to disseminate critical information and interact with the design team. • Please be aware that many roles will be subject to both security and export control restrictions. These restrictions mean that factors including new starter’s nationality, any previous or dual nationalities held, place of birth and country of residence may limit those roles that you can perform for the organisation. • Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members not through our approved vendor list or Talent Acquisition will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.