Ambiq Micro, Inc. - Staff Engineer - Physical Design
Requirements
• Master or Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field. • At least 8 years of experience in integrated circuit physical design. • Strong experience with physical design flows, including floorplanning, placement, routing, clock tree synthesis, and physical verification. • Hands-on experience with Cadence Innovus and/or Synopsys Fusion Compiler. • Solid understanding of digital circuit design principles. • Experience with timing closure, power integrity, signal integrity, IR drop, and EM analysis. • Proficiency with industry-standard EDA tools from Cadence and Synopsys. • Strong analytical, problem-solving, and communication skills. • Ability to work effectively with cross-functional engineering teams. • Experience with TCL scripting; Python experience is a plus. • Fluency in English and Mandarin is required, as this role involves close collaboration with Chinese-speaking engineering counterparts.
Responsibilities
• Lead the physical design flow from netlist to GDS, including floorplanning, placement, clock tree synthesis, routing, physical verification, and DFM. • Drive timing closure, IR drop and EM closure, signal integrity analysis, and layout violation resolution. • Use industry-standard EDA tools from Cadence and Synopsys for place and route, static timing analysis, physical verification, and signoff analysis. • Work closely with designers, synthesis engineers, DFT engineers, and other stakeholders to resolve implementation challenges. • Improve physical design methodologies, scripts, and flows to increase efficiency, consistency, and quality. • Stay current with advancements in physical design, EDA tools, and new process nodes.
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