Ambiq Micro, Inc. - DFT Intern
Requirements
• Currently pursuing a B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field • Digital logic design • VLSI design / ASIC design • Computer architecture (preferred) • Familiarity with Verilog, SystemVerilog or VHDL and fundamental digital design concepts such as timing, clocking, reset, and pipelining • Comfortable working in a Linux/UNIX environment • Strong analytical, debugging, and problem-solving skills • Good communication skills and a collaborative mindset • Scan insertion or ATPG • MBIST, memory repair, or embedded memory testing • ASIC design, or synthesis • Basic understanding of DFT concepts such as scan, ATPG, MBIST, fault coverage, and memory repair • Exposure to industry standard EDA tools • Scripting experience in Tcl, Python, or Shell for flow automation • Familiarity with fault models such as stuck-at, transition, bridging, memory faults • Understanding of low power design concepts such as multiple power domains, retention, or clock gating
Responsibilities
• Support low power DFT implementation and verification for SoC designs • Assist with scan insertion, scan chain verification for physical design modules • Assist with MBIST insertion and verification for embedded memories • Analyze DFT rule checking results and help resolve design and testability issues • Support test coverage analysis and identify opportunities for coverage improvement • Develop and maintain scripts (e.g., Tcl, Python, Shell) to automate recurring tasks and improve engineering productivity • Document methodologies, results, and key learnings, and present progress to your mentor and the broader team • Collaborate with RTL, DFT, DV, and physical design engineers to debug implementation, coverage, and timing issues
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