lumilens - Senior/Staff Process Engineer (Flip Chip)

• 1. Owns the process development and technical support of the Flip Chip process for silicon photonic chip wafers, with OSAT or internal line. Process may include plasma cleaning, flux engineering, pick & place, reflow, underfill, curing and/or TCB/NCP flux-less flow. • 2. DOE to characterize process window and margin. Optimize process integration with upstream processes (e.g. bump/FO) to increase yield and manufacturability. • 3. Material Characterization & Selection: Evaluate and qualify new manufacturing raw materials, including NCP, flux, underfill etc, as applicable. • 4. Design and execute DOE plans to characterize thermal and mechanical stress. Lead reliability validations including Temperature Cycling Test (TCT), Unbiased Highly Accelerated Stress Test (HAST) and High-Temperature Storage (HTS). • 5. Failure Analysis & Debug: Own the root-cause diagnostics of structural failure modes unique to FC (e.g. flux void, residue, misalignment, die warpage, reflow anomaly, underfill void etc), and formulate improvement solutions. • 6. Manage incoming material quality control, establish SPC control plans and monitor process variation to ensure long-term process stability. • 7. Compile process SOP, WI, process failure reports and engineering change documents; support NPI new product introduction and process verification.